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cy7c1041cv33 automotive 4-mbit (256 k 16) static ram cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 001-67307 rev. *a revised may 24, 2011 4-mbit (256 k 16) static ram features temperature ranges ? automotive-a: ?40 c to 85 c ? automotive-e: ?40 c to 125 c pin and function compatible with cy7c1041bnv33 high speed ? t aa = 10 ns (automotive-a) ? t aa = 12 ns (automotive-e) low active power ? 432 mw (max) 2.0 v data retention automatic power down when deselected ttl-compatible inputs and outputs easy memory expansion with ce and oe features available in pb-free and non pb-free 44-pin 400 mil soj, 44-pin tsop ii and 48-ball fbga packages functional description the cy7c1041cv33 automotive is a high performance cmos static ram organized as 262,144 words by 16 bits. to write to the device, take chip enable (ce ) and write enable (we ) inputs low. if byte low enable (ble ) is low, then data from i/o pins (i/o 0 through i/o 7 ), is written into the location specified on the address pins (a 0 through a 17 ). if byte high enable (bhe ) is low, then data from i/o pins (i/o 8 through i/o 15 ) is written into the location specified on the address pins (a 0 through a 17 ). to read from the device, take chip enable (ce ) and output enable (oe ) low while forcing the write enable (we ) high. if byte low enable (ble ) is low, then data from the memory location specified by the address pins appear on i/o 0 to i/o 7 . if byte high enable (bhe ) is low, then data from memory appears on i/o 8 to i/o 15 . for more information, see the truth table on page 10 for a complete description of read and write modes. the input and output pins (i/o 0 through i/o 15 ) are placed in a high impedance state when the device is deselected (ce high), the outputs are disabled (oe high), the bhe and ble are disabled (bhe , ble high), or during a write operation (ce low and we low). logic block diagram 256k x 16 ram array i/o 0 ?i/o 7 row decoder a 0 a 1 a 2 a 3 a 6 column decoder a 10 a 11 a 12 a 13 a 14 sense amps input buffer oe a 4 a 5 i/o 8 ?i/o 15 we ble bhe a 15 a 8 a 7 a 16 a 17 ce a 9 [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 2 of 17 contents selection guide ................................................................ 3 pin configuration ............................................................. 3 pin definitions .................................................................. 4 maximum ratings ............................................................. 5 operating range ............................................................... 5 electrical characteristics ................................................. 5 capacitance ...................................................................... 6 thermal resistance .......................................................... 6 ac test loads and waveforms ....................................... 6 switching characteristics ................................................ 7 switching waveforms ...................................................... 8 truth table ...................................................................... 10 ordering information ...................................................... 11 ordering code definitions ..... .................................... 11 package diagrams .......................................................... 12 acronyms ........................................................................ 15 document conventions ................................................. 15 units of measure ....................................................... 15 document history page ................................................. 16 sales, solutions, and legal information ...................... 17 worldwide sales and design s upport ......... .............. 17 products .................................................................... 17 psoc solutions ......................................................... 17 [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 3 of 17 selection guide description -10 -12 -20 unit maximum access time 10 12 20 ns maximum operating curre nt automotive-a 100 ? 85 ma automotive-e ? 120 90 ma maximum cmos standby current automotive-a 10 ? 10 ma automotive-e ? 15 15 ma pin configuration figure 1. 44-pin soj/tsop ii (top view) [1] figure 2. 48-ball fbga pinout (top view) [1] 1 2 3 4 5 6 7 8 9 11 14 31 32 36 35 34 33 37 40 39 38 12 13 41 44 43 42 16 15 29 30 a 17 18 17 20 19 27 28 25 26 22 21 23 24 a 16 a 15 a 0 a 1 a 2 a 3 a 4 a 7 a 6 a 14 a 13 a 12 a 11 a 9 a 8 a 10 oe bhe ble ce we io 0 io 1 io 2 io 3 io 4 io 5 io 6 io 7 io 8 io 9 io 10 io 11 io 12 io 13 io 14 io 15 v cc v cc v ss v ss nc 10 a 5 we a 11 a 10 a 6 a 0 a 3 ce io 2 io 0 io 1 a 4 a 5 io 3 io 5 io 4 io 6 io 7 v ss a 9 a 8 oe a 7 io 8 bhe nc a 17 a 2 a 1 ble io 9 io 10 io 11 io 12 io 13 io 14 io 15 a 15 a 14 a 13 a 12 nc nc nc 3 26 5 4 1 d e b a c f g h a 16 nc v cc v cc v ss note 1. nc pins are not connected on the die. [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 4 of 17 pin definitions pin name soj, tsop pin number bga pin number i/o type description a 0 ?a 17 1?5, 18?27, 42?44 a3, a4, a5, b3, b4, c3, c4, d4, h2, h3, h4, h5, g3, g4, f3, f4, e4, d3 input address inputs . used to select one of the address locations. i/o 0 ?i/o 15 7?10,13?16, 29?32, 35?38 b1, c1, c2, d2, e2, f2, f1, g1, b6, c6, c5, d5, e5, f5, f6, g6 input or output bidirectional data i/o lines . used as input or output lines depending on operation. nc 28 a6, e3, g2, h1, h6 no connect no connects . not connected to the die. we 17 g5 input or control write enable input, active low . when selected low, a write is conducted. when deselected high, a read is conducted. ce 6 b5 input or control chip enable input, active low . when low, selects the chip. when high, deselects the chip. bhe , ble 40, 39 b2, a1 input or control byte write select inputs, active low . bhe controls i/o 15 ? i/o 8 , ble controls i/o 7 ? i/o 0 . oe 41 a2 input or control output enable, active low . controls the direction of the i/o pins. when low, the i/o pins are allowed to behave as outputs. when deasserted high, the i/o pins are tri-stated and act as input data pins. v ss 12, 34 d1, e6 ground ground for the device . connected to ground of the system. v cc 11, 33 d6, e1 power supply power supply inputs to the device. [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 5 of 17 maximum ratings exceeding maximum ratings may impair the useful life of the device. these user guidelines are not tested. storage temperature .... ............ ............... ?65 ? c to +150 ? c ambient temperature with power applied ... .............. .............. .......... ?55 ? c to +125 ? c supply voltage on v cc relative to gnd [2] ..?0.5 v to +4.6 v dc voltage applied to outputs in high z state [2] ................................. ?0.5 v to v cc + 0.5 v dc input voltage [2] ............................. ?0.5 v to v cc + 0.5 v current into outputs (low) .... .................................... 20 ma static discharge voltage ......................................... > 2001 v (mil-std-883, method 3015) latch up current ................................................... > 200 ma operating range range ambient temperature (t a ) v cc automotive-a ?40 ? c to +85 ? c 3.3 v ? 10% automotive-e ?40 ? c to +125 ? c electrical characteristics over the operating range parameter description test conditions -10 -12 -20 unit min max min max min max v oh output high voltage v cc = min, i oh = ?4.0 ma 2.4 ? 2.4 ? 2.4 ? v v ol output low voltage v cc = min, i ol = 8.0 ma ?0.4?0.4?0.4 v v ih input high voltage 2.0 v cc + 0.3 2.0 v cc + 0.3 2.0 v cc + 0.3 v v il [2] input low voltage ?0.3 0.8 ?0.3 0.8 ?0.3 0.8 v i ix input leakage current gnd < v i < v cc auto-a ?1 +1 ? ? ?1 +1 ? a auto-e ? ? ?20 +20 ?20 +20 i oz output leakage current gnd < v out < v cc , output disabled auto-a ?1 +1 ? ? ?1 +1 ? a auto-e ? ? ?20 +20 ?20 +20 i cc v cc operating supply current v cc = max, f = f max = 1/t rc auto-a ? 100 ? ? ? 85 ma auto-e ? ? ? 120 ? 90 i sb1 automatic ce power down current ?ttl inputs max v cc , ce > v ih , v in > v ih , or v in < v il , f = f max auto-a ? 40 ? ? ? 40 ma auto-e???45?45 i sb2 automatic ce power down current ? cmos inputs max v cc , ce > v cc ? 0.3 v, v in > v cc ? 0.3 v, or v in < 0.3 v, f = 0 auto-a ? 10 ? ? ? 10 ma auto-e???15?15 note 2. v il (min) = ?2.0 v and v ih (max) = v cc + 0.5 v for pulse durations of less than 20 ns. [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 6 of 17 ac test loads and waveforms capacitance parameter [3] description test conditions max unit c in input capacitance t a = 25 ? c, f = 1 mhz, v cc = 3.3 v 8 pf c out output capacitance 8pf thermal resistance parameter [3] description test conditions 44-pin soj 44-pin tsop ii 48-ball fbga unit ? ja thermal resistance (junction to ambient) test conditions follow standard test methods and procedures for measuring thermal impedance, per eia/jesd51 25.99 42.96 38.15 ? c/w ? jc thermal resistance (junction to case) 18.8 10.75 9.15 ? c/w figure 3. ac test loads and waveforms [4] 90% 10% 3.0 v gnd 90% 10% all input pulses 3.3 v output 30 pf* * capacitive load consists of all components of the test environment (b) r 317 ? r2 351 ? rise time: 1 v/ns fall time: 1 v/ns 30 pf* output z = 50 ? 50 ? 1.5 v (c) (a) 3.3 v output 5 pf (d) r 317 ? r2 351 ? 10-ns devices: 12-, 15-, 20-ns devices: high z characteristics: notes 3. tested initially and after any design or process changes that may affect these parameters. 4. ac characteristics (except high z) for 10 ns pa rts are tested using the load conditions shown in figure 3 (a). all other speeds are tested using the thevenin load shown in figure 3 (b). high z characteristics are tested fo r all speeds using the test load shown in figure 3 (d). [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 7 of 17 switching characteristics over the operating range [5] parameter description -10 -12 -20 unit min max min max min max read cycle t power [6] v cc (typical) to the first access 100 ? 100 ? 100 ? ? s t rc read cycle time 10?12?20?ns t aa address to data valid ? 10 ? 12 ? 20 ns t oha data hold from address change 3 ? 3 ? 3 ? ns t ace ce low to data valid ?10?12?20ns t doe oe low to data valid auto-a ? 5 ? 6 ? 8 ns auto-e???7?8 t lzoe oe low to low z [7] 0?0?0?ns t hzoe oe high to high z [7, 8] ?5?6?8ns t lzce ce low to low z [7] 3?3?3?ns t hzce ce high to high z [7, 8] ?5?6?8ns t pu ce low to power up 0?0?0?ns t pd ce high to power down ? 10 ? 12 ? 20 ns t dbe byte enable to data valid auto-a ? 5 ? 6 ? 8 ns auto-e???7?8 t lzbe byte enable to low z 0 ? 0 ? 0 ? ns t hzbe byte disable to high z ? 6 ? 6 ? 8 ns write cycle [9, 10] t wc write cycle time 10?12?20?ns t sce ce low to write end 7 ? 8 ? 10 ? ns t aw address setup to write end 7 ? 8 ? 10 ? ns t ha address hold from write end 0 ? 0 ? 0 ? ns t sa address setup to write start 0 ? 0 ? 0 ? ns t pwe we pulse width 7 ? 8 ?10?ns t sd data setup to write end 5?6?8?ns t hd data hold from write end 0 ? 0 ? 0 ? ns t lzwe we high to low z [7] 3?3?3?ns t hzwe we low to high z [7, 8] ?5?6?8ns t bw byte enable to end of write 7 ? 8 ? 10 ? ns notes 5. test conditions assume signal transition time of 3 ns or less , timing reference levels of 1.5 v, and input pulse levels of 0 to 3.0 v. 6. t power gives the minimum amount of time that the power supply is at typical v cc values until the first memory access is performed. 7. at any temperature and voltage condition, t hzce is less than t lzce , t hzbe is less than t lzbe , t hzoe is less than t lzoe , and t hzwe is less than t lzwe for any device. 8. t hzoe , t hzce , t hzbe , and t hzwe are specified with a load capacitance of 5 pf as in part (d) of figure 3 on page 6 . transition is measured ? 500 mv from steady state voltage. 9. the internal write time of the memory is defined by the overlap of ce low, we low, and bhe /ble low. ce , we, and bhe /ble must be low to initiate a write. the transition of these signals terminate the write. the input dat a setup and hold timing is referenced to the leading edge of the signal that terminates the write. 10. the minimum write cycle time for write cycle no. 3 (we controlled, oe low) is the sum of t hzwe and t sd . [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 8 of 17 switching waveforms figure 4. read cycle no. 1 (address transition controlled) [11, 12] figure 5. read cycle no. 2 (oe controlled) [12, 13] previous data valid data valid rc t aa t oha t rc address data out 50% 50% data valid t rc t ace t doe t lzoe t lzce t pu high impedance t hzoe t hzbe t pd t dbe t lzbe t hzce high impedance i cc i sb oe ce address data out v cc supply bhe ,ble current notes 11. device is continuously selected. oe , ce , bhe, and/or ble = v il . 12. we is high for read cycle. 13. address valid prior to or coincident with ce transition low. [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 9 of 17 figure 6. write cycle no. 1 (ce controlled) [14, 15] figure 7. write cycle no. 2 (ble or bhe controlled) switching waveforms (continued) t hd t sd t sce t sa t ha t aw t pwe t wc bw t data io address ce we bhe ,ble t hd t sd t bw t sa t ha t aw t pwe t wc t sce data io address bhe ,ble ce we notes 14. data io is high impedance if oe , bhe , and/or ble = v ih . 15. if ce goes high simultaneously with we going high, the output remains in a high impedance state. [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 10 of 17 figure 8. write cycle no. 3 (we controlled, oe low) truth table ce oe we ble bhe i/o 0 ?i/o 7 i/o 8 ?i/o 15 mode power h x x x x high z high z power down standby (i sb ) l l h l l data out data out read ? all bits active (i cc ) l h data out high z read ? lower bits only active (i cc ) h l high z data out read ? upper bits only active (i cc ) l x l l l data in data in write ? all bits active (i cc ) l h data in high z write ? lo wer bits only active (i cc ) h l high z data in write ? upper bits only active (i cc ) l h h x x high z high z selected, outputs disabled active (i cc ) l x x h h high z high z selected, outputs disabled active (i cc ) switching waveforms (continued) t hd t sd t sce t ha t aw t pwe t wc t bw t sa t lzwe t hzwe data io address ce we bhe ,ble [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 11 of 17 ordering code definitions ordering information cypress offers other versions of this type of product in many different configurations an d features. the below table contains o nly the list of parts that are currently av ailable.for a complete listing of all options, visit the cypress website at www.cypress.com and refer to the product summary page at http://www.cypress.com/products or contact your local sales representative. cypress maintains a worldwide network of offices, solution cent ers, manufacturer?s representativ es and distributors. to find th e office closest to you, visit us at http://www.cypress.com/ go/datasheet/offices . speed (ns) ordering code package diagram package type operating range 10 cy7c1041cv33-10baxa 51-85106 48-ball fbga (pb-free) automotive-a cy7c1041cv33-10zsxa 51-85087 44-pin tsop ii (pb-free) 12 cy7c1041cv33-12baxe 51-85106 48-ball fbga (pb-free) automotive-e CY7C1041CV33-12ZSXE 51-85087 44-pin tsop ii (pb-free) 20 cy7c1041cv33-20zsxa 51-85087 44-pin tsop ii (pb-free) automotive-a cy7c1041cv33-20vxe 44-pin (400-mil) molded soj (pb-free) automotive-e cy7c1041cv33-20zsxe 44-pin tsop ii (pb-free) please contact your local cypress sales re presentative for availability of these parts temperature range: x = a or e a = automotive; e = automotive extended x = pb-free; x absent = leaded package type: xx = ba or zs or v ba = 48-ball fbga zs = 44-pin tsop ii v = 44-pin (400-mil) molded soj speed grade: xx = 10 ns or 12 ns or 20 ns v33 = 3.0 v to 3.6 v process technology:c ? 150 nm data width: 16-bits 4-mbit density fast asynchronous sram marketing code: 7c = srams company id: cy = cypress cy 1 c - xx xx x v33 x 7c 04 1 [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 12 of 17 package diagrams figure 9. 44-pin soj 400 mils v44.4, 51-85082 51-85082 *c [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 13 of 17 figure 10. 44-pin tsop z44-ii, 51-85087 package diagrams (continued) 51-85087 *c [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 14 of 17 figure 11. 48-ball fbga (7.0 8.5 1.2 mm) ba48a , 51-85106 package diagrams (continued) 51-85106 *f [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 15 of 17 acronyms document conventions units of measure acronym description ce chip enable cmos complementary metal oxide semiconductor fbga fine-pitch ball grid array i/o input/output oe output enable soj small outline j-lead sram static random access memory tsop thin small outline package ttl transistor-transistor logic we write enable symbol unit of measure c degree celcius mhz mega hertz a micro amperes s micro seconds ma milli amperes mm milli meter ms milli seconds mw milli watts ns nano seconds ? ohms % percent pf pico farad vvolts wwatts [+] feedback
cy7c1041cv33 automotive document number: 001-67307 rev. *a page 16 of 17 document history page document title: cy7c1041cv33 automotive, 4-mbit (256 k 16) static ram document number: 001-67307 rev. ecn no. issue date orig. of change description of change ** 3187164 03/03/2011 pras separation of the automotive datasheet from cy7c1041cv33 spec no. 38-05134 rev. *k. further rev of 38-05134 would include only industrial / commercial parts. *a 3265070 05/24/2011 pras updated functional description (removed ?for best practice recommendations, refer to the cypress application note an1064, sram system guidelines.?). [+] feedback
document number: 001-67307 rev. *a revised may 24, 2011 page 17 of 17 all products and company names mentioned in this document may be the trademarks of their respective holders. cy7c1041cv33 automotive ? cypress semiconductor corporation, 2011. the information contained herein is subject to change without notice. cypress semico nductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress product. nor does it convey or imply any license under patent or other rig hts. cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with cypres s. furthermore, cypress does not authorize its products for use as critical components in life-support systems where a ma lfunction or failure may reasonably be expe cted to result in significant injury to the user. the inclusion of cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. any source code (software and/or firmware) is owned by cypress semiconductor corporation (cypress) and is protected by and subj ect to worldwide patent protection (united states and foreign), united states copyright laws and internatio nal treaty provisions. cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the cypress source code and derivative works for the sole purpose of creating custom software and or firmware in su pport of licensee product to be used only in conjunction with a cypress integrated circuit as specified in the applicable agreement. any reproduction, modification, translation, compilation, or repre sentation of this source code except as specified above is prohibited without the express written permission of cypress. disclaimer: cypress makes no warranty of any kind, express or implied, with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes without further notice to t he materials described herein. cypress does not assume any liability arising out of the application or use of any product or circuit described herein. cypress does not authori ze its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. the inclusion of cypress? prod uct in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies cypress against all charges. use may be limited by and subject to the applicable cypress software license agreement. sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representatives, and distributors. to find t he office closest to you, visit us at cypress locations . products automotive cypress.co m/go/automotive clocks & buffers cypress.com/go/clocks interface cypress. com/go/interface lighting & power control cypress.com/go/powerpsoc cypress.com/go/plc memory cypress.com/go/memory optical & image sensing cypress.com/go/image psoc cypress.com/go/psoc touch sensing cyp ress.com/go/touch usb controllers cypress.com/go/usb wireless/rf cypress.com/go/wireless psoc solutions psoc.cypress.com/solutions psoc 1 | psoc 3 | psoc 5 [+] feedback

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